Status of DAQ Yamaga, Sakashita, Sugaya 2/22/2002 @ E391a DAQ-CsI meeting ADC readout o Block transfer for LRS1885N failed at KEK and SP8. o Channel-by-channel readout is possible. ~10 msec/event/10modules * Use channel-by-channel reading in this summer. * Ask NGF company for the way of faster readout for 1885N. * Find another type of ADC (e.g. CIAFB). FASTBUS DC power supply o Series-dropper type regulator will be ordered soon. TDC readout,TKO DC power supply o Done. Amp-Discri-Delay-Sum module o Modification of design in progress. HV o Last two CAEN crate and HV modules arrived at KEK. o Control via serial cable in this summer. Cable o RG58C/U for signal (100m). 3D-FB for trigger (40m). 17-pair twisted with shield (40m). o Modification of ADC-input cable ordered. Patch panel for ADC-input cable ordered. * RG58 and twisted-pair cables should be ordered as soon as possible. It will take ~3 month to prepare all of them. * 3D-FB will not take so long. * Shield-room in this summer ? AC Power line o Requirement (at full power consumption) FASTBUS ... 10.4 kVA (5 power supplys) TKO ... 4.4 kVA (2.2 KVA x 2) NIM ... kVA (10 NIM crate) HV ... 3.6 KVA (CAEN SY527 x 4) 3.0 KVA (LeCroy 1458HP x 2) Others ... ? * 100V AVR ... up to 20kVA(200A). * 200V AC line will be preferrable for FASTBUS and HV. But we will able to do with 100V AVR only for this summer. * Prepare 200V AVR for the experiment ? Software o MIDAS software will be available in this summer. Event building has a less priority. (Simple test already done.) o Raw-data bank and format should completely be owing to Yamaga, Sakashita, Sugaya. Users can get data through e.g. structure in C-program, and need not care about raw-data format.